DOC SVC.S.01REV 2026.07
PAGE 03 / 08● LIVE
← All services / S.01

ASIC Design & Verification

ASIC engineering support can include architecture, RTL, verification, DFT, physical implementation, and sign-off. The statement of work identifies the stages, responsibilities, and evidence included.

ASIC_COREL2$ · 256KAXI4 CROSSBAR · 256bDDR4 PHYPCIe G4FIG.S.01SCALE 1:1 · ALL UNITS µm
FIG. S.01 — TYPICAL ARCHITECTURE
▌ What you get

Deliverables.

  • D.01Architecture exploration & specification
  • D.02RTL design (synthesizable, lint-clean)
  • D.03UVM verification environment & test plan
  • D.04Coverage closure (functional + code + assertion)
  • D.05DFT insertion (scan, MBIST, ATPG)
  • D.06Synthesis, P&R, STA, sign-off
  • D.07GDSII handoff & post-silicon support
▌ How we run it

Method.

01
Discover
02
Spec
03
RTL
04
Verify
05
Implement
06
Tape-out
▌ Project constraints
Scope-defined processClient-selected foundryAgreed toolchain
▌ RelatedSTACK WITH

Other capabilities.

▌ Engage with us

Bring us your hardest verification problem.

A focused specialist or a defined work package — scope, responsibilities, milestones, and evidence are agreed for each engagement.